Senior Standard Cell Design Engineer



Penang, Malaysia
Posted on Wednesday, October 18, 2023

Bitdeer Group is a leader in the crypto-mining space. It is the largest supplier of hashrate and one of the largest holders of proprietary hashrate in the world, empowering miners from around the world. It was founded by Jihan Wu, an early advocate and pioneer in cryptocurrency who cofounded multiple leading companies serving the crypto economy. Matt Linghui Kong, the CEO of Bitdeer Group, provides leadership through deep industry knowledge and technology expertise.

Headquartered in Singapore, Bitdeer Group operates around the world with major data centers in the United States and Norway. It offers specialized mining infrastructure, high-quality hash rate sharing products, and reliable hosting services to global miners.

Dedication, authenticity, and trustworthiness are foundational to our mission of becoming the world’s most reliable provider of full-spectrum crypto mining services. We welcome global talent to join us in shaping the future – by making crypto mining services accessible to all.

About the team

Based in our Singapore regional HQ office, you will be part of our IC Lab team. As a standard Cell Design Engineer in the Physical Design Group, you will develop your skills working on some of the most sophisticated process nodes targeting the largest foundries. This role will contribute to designing our physical IP standard cell offerings for our internal and external customers at leading edge nodes including 5nm and beyond. Work with partners inside the company, as well as our partners in the EDA and foundry space.

What you will be responsible for

  • Design standard cell circuits and verify them for functionality, performance, and power
  • Generate and validate EDA model views of standard cells

How you will stand out

  • 3- 5 years of relevant circuit design experience
  • At least Bachelor/Masters in Electronic Engineering
  • Rich experiences of standard cell timing lib characterization for delay, noise, variation and power modeling
  • Rich experience of standard cell timing lib validation and correlation
  • Experience with transistor level circuit design using Cadence Virtuoso and circuit simulators such as SPICE, SPECTRE
  • An understanding of transistor level device physics and standard cell layout
  • Knowledge of power, performance, and area tradeoffs
  • An ability to learn a wide variety of industry standard view and modeling formats such as Liberty, Verilog, LEF, NDM, APL, GDS
  • Scripting skills in either Tcl, PERL or Python would be preferable but not mandatory.
  • Dedication to quality, collaboration, curiosity and continual improvement

What you will experience working with us:

  • A culture that values authenticity and diversity of thoughts and backgrounds;
  • An inclusive and respectable environment with open workspaces and exciting start-up spirit;
  • Fast-growing company with the chance to network with industrial pioneers and enthusiasts;
  • Ability to contribute directly and make an impact on the future of the digital asset industry;
  • Involvement in new projects, developing processes/systems;
  • Personal accountability, autonomy, fast growth, and learning opportunities;
  • Attractive welfare benefits and developmental opportunities such as training and mentoring.


Bitdeer is committed to providing equal employment opportunities in accordance with country, state, and local laws. Bitdeer does not discriminate against employees or applicants based on conditions such as race, colour, gender identity and/or expression, sexual orientation, marital and/or parental status, religion, political opinion, nationality, ethnic background or social origin, social status, disability, age, indigenous status, and union.